Name dfndr_bs; Partno xxxx; Date 01/02/99; Revision 01; Designer Honeycutt; Company Games 2084; Assembly None; Location None; Device p22v10; /****************************************************************/ /* */ /* Williams Multigame defender bankswitching PLD */ /* */ /****************************************************************/ /* Allowable Target Device Types : PAL22V10 */ /****************************************************************/ /** Inputs **/ PIN 1 = clock; /* Register Clock */ PIN [2..4] = [D2..0]; /* CPU Data Bus D2, D2, D0 */ PIN [5..7] = [A_IN14..12]; /* Address lines in */ PIN 8 = !ROMCS_IN; /* ROM Chipselect in */ PIN 9 = !DXXX; /* Addr DXXX selected */ PIN 10 = !defender; /* Defender game selected */ PIN 11 = !wrt_ena; /* Write Enable & E clock */ PIN 13 = !reset; /* CPU BD Power up reset */ PIN 14 = !CXXX; /* Addr CXXX selected */ /** Outputs **/ PIN 23 = bnk_clock; /* Bank select latch clock */ PIN [22,21,20] = [A_OUT14..12]; /* Address lines out */ PIN [19] = !ROMCS_OUT; /* ROM chipselect out */ PIN [18,17,16] = [Q2..0]; /* Latched register outputs */ PIN 15 = !IO_OUT; /* I/O space access output */ /** Declarations and Intermediate Variable Definitions **/ field b_sel_in = [D2..0]; /* ROM Bank select in */ field b_sel_out = [Q2..0]; /* latched ROM Bank select */ banksw_ena = Q2 # Q1 # Q0; do_banksw = banksw_ena & CXXX; /** Logic Equations **/ /* This output is wired externally to the clock input */ bnk_clock = wrt_ena & DXXX & defender; b_sel_out.d = b_sel_in; /* latch the auto-sel inputs */ IO_OUT = !banksw_ena & CXXX; /* I/O Space access */ A_OUT12 = !do_banksw & A_IN12 # do_banksw & !Q2 & Q1 & !Q0 # do_banksw & Q2; A_OUT13 = !do_banksw & A_IN13 # do_banksw & Q1 & Q0; A_OUT14 = !do_banksw & A_IN14; ROMCS_OUT = !do_banksw & ROMCS_IN # do_banksw; /* Use the 'Q' name here because the compiler pukes when the */ /* auto_latch name is used. */ Q0.sp = 'b'0; /* preset not used */ Q0.ar = reset; /* Power up reset */