The following williams-multigame-schematic issues
-------------------------------------------------

1. D3 signal to GameSelectPLD should be D7 (Loc D2)
   Note: RomSwitcher code asserts D7 not D3 for sound card reset

2. NVRAM write enable is wrong.
   -Cut signal to NVRAM (U2) pin-22 (~OE).
   -Connect U2 Pin-22 to J2 Pin-16 (WRT from ROM board)
   
   -Cut signal to NVRAM (U2) pin-20 (~CE).
   -Invert J2 Pin 9 (~CMOS) so it is an active high signal (CMOS)
       ~CMOS is ROM BD IC 3B Pin 9 (Addr CC00-CFFF)
   -NAND (CMOS) with J2 Pin 15 (E Clock) and connect to NVRAM (~CE)
    (i.e assert NVRAM ~CE when in CMOS Address range and E Clk is -high)

3. EEPROM Erronously enabled for Defender write to Dxxx
   -Cut ground connection to U1 pin 22 (EEPROM ~CE)
   -Connect J2 pin-16 (WRT from ROM board) to U1 pin-22 (EEPROM ~CE)